## Pedal Pi sample rate 8 months 2 weeks ago #1505

 Ham OFFLINE New Member Posts: 5 Thank you received: 1 Karma: 1 Hi I have a PedalMega and am thinking of getting a PedalPi as well. I have read through the posts on how it works and can’t work out the sample rate from the code - can you explain that? There seem to be no clear timing functions. I presume on the arduinos the sample rate is set as the interrupt frequency but this doesn’t apply to the Pi. Thanks for any help Paul The administrator has disabled public write access.

## Pedal Pi sample rate 8 months 2 weeks ago #1512

 Ham OFFLINE New Member Posts: 5 Thank you received: 1 Karma: 1 Hi Ray I can’t see in the datasheet how the adc controls the timing - the spi clock is pi powered. How dies the pi know a sample is ready? Sorry - I know I have missed something just can’t figure out what! The administrator has disabled public write access.

## Pedal Pi sample rate 8 months 2 weeks ago #1513

 Ham OFFLINE New Member Posts: 5 Thank you received: 1 Karma: 1 I am a bit further. The adc seems to want the clock rate to be 0.9Mhz for 2.7v - I had assumed a faster spi clock rate would be ok as long as there was a pause between samples and that the sample rate was 50khz. The only piece missing is the code says the spi rate is 4Mhz not 0.9MHz. The administrator has disabled public write access.

## Pedal Pi sample rate 8 months 1 week ago #1515

 Ray NOW ONLINE Moderator Posts: 614 Thank you received: 138 Karma: 38 Hi again!Hi Ray I can’t see in the datasheet how the adc controls the timing - the spi clock is pi powered. How dies the pi know a sample is ready? Sorry - I know I have missed something just can’t figure out what!Sorry for not being very clear. The SPI bus is much faster than the external ADC, so the bottleneck is the ADC not the SPI. The Pi does not actively know when the new sample is ready, but it just reads the ADC in a loop and if the new sample is ready, great! you read the new sample. If the new sample is not ready, the pi will read again the "old" sample, but it is not catastrophic, you will just get a redundant sample. It's kind of oversampling. I am a bit further. The adc seems to want the clock rate to be 0.9Mhz for 2.7v - I had assumed a faster spi clock rate would be ok as long as there was a pause between samples and that the sample rate was 50khz. The only piece missing is the code says the spi rate is 4Mhz not 0.9MHz. Yes, the SPI is configured to work at 4MHz, maybe is a bit over killing as you only need 0.9MHz, but as I said before is not that bad, the pi has plenty of computing power and maybe you can even apply an averaging mechanism to eliminate noise from samples. The administrator has disabled public write access.
Time to create page: 0.112 seconds
Joomla SEF URLs by Artio